What’s wrong with this picture? (Impedance matching and other things)
It’s about time we talked about high speed signals, impedance matching and signal reflections. Take a look at this picture:
There is something clearly wrong with the image above, the pixels are all there and the colours are almost right, but what you’re seeing above isn’t what was sent from the FPGA. What I think I’m seeing here is signal trace length skew and signal reflections.