Retro CPC Dongle – Part 20.1

I’ve posted the files of my work to date.  They’re rough and will need some work if you want to compile them, but it’s working!

Code is posted on GitHub here.

The support software provides a stdio connection to the Atmel supervisor, allowing me to start working on the connection to the video chip and seeing the results in real time. Stay tuned!

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Retro CPC Dongle – Part 20

Finally, after weeks* of effort I can write about the SPI interface between the Atmel SAM4S supervisor chip and the support CPU in the FPGA. You’ll recall from my last post that I had this working in emulation, but anyone who has worked on FPGAs or RTL code before, a simulation is still a long way from a working configuration. Still, after a bit of work, I managed to get this:

I managed to reliably pass the string ‘ABCD’ (0x41 0x42 0x43 0x44 in hex) across the SPI interface in response to a keypress going from the picocom terminal through the USB serial port of the supervisor chip, passed through the SPI module of the Atmel SAM chip into the FPGA across 4 lines of control and signal, into the soft Z80 CPU. Responding to the incoming data, the software stored in the ‘ROM’ in the supervisor functions would read the transmitted keypress, store it in memory and return ‘ABCD’ across the SPI interface by requesting another transfer from the master. Continue reading

Retro CPC Dongle – Part 19

It’s been 2 months since I wrote about setting up the SPI connection between the supervisor and FPGA. That time hasn’t been idle, but I still don’t quite yet have a proven SPI connection.  What I do have is a Z80 CPU running a program to exercise the SPI connection in a simulation. Valuable lessons were learned along the way that I hope you’ll find useful. Let’s start with a nice picture of the simulation waveforms!

Simulation Waveform, click for bigger image

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Retro CPC Dongle – Part 18

Since my last post, I’ve been beavering away on the SPI interface between the Atmel supervisor chip and the FPGA. The SPI interface is almost ready to share, but not quite. In the meantime, I’ll share the little side project I’ve been working on, replacing the NAND raw flash with an eMMC chip on the CPC2.0 board.

I wrote about raw flash and the challenges of writing a flash translation later in part 16 of this series. After some research, I concluded that the eMMC interface looked exactly like the much more common SDCard interface, albeit that the interface can be run with an 8-bit width. SDCards are limited to 4 bits by the physical pin count. Taking a gamble I created a board to test this new eMMC chip. I created a fake SDCard!

This fake card allowed me to check very quickly if my assumptions were correct both at a hardware and a firmware level. I wanted to be sure that it was possible to interface the eMMC via 4 bits, rather than the full 8 bits and be sure the firmware instructions were the same between these two technologies.

The Atmel SAM4S chip has a hardware interface for SDCards. If the eMMC worked with the SDCard interface, I just needed to hook up the eMMC to the Atmel SAM4S chip using the built-in HSMCI interface. I could then use the libraries provided in the Atmel Software Framework to interface to the card. No effort required and definitely no flash translation layer required!

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Retro CPC Dongle – Part 17

As I was explaining to someone recently, bootstrapping a completely new, custom design is hard. There are no tools or pre-existing software to manage the device (Atmel/Altera tools aside). Everything has to be built from scratch. It’s been quite a while since I started this project to get to this point, but I’m getting close now to a workable infrastructure. Once the foundation is in place it will allow rapid development of the CPC portions of this project. Here’s the UI part of the work so far:

Supervisor software screen grab (yes, I borrowed the CPC colours for authenticity)

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Retro CPC Dongle – Part 16

It’s been a while since my last post, so I thought it about time I provided an update. I’ve been working on the supervisory software inside the SAM4 microcontroller.

Here are the planned features for this chip:

  • Flash management including flash translation layer
  • MRAM management
  • Provide an interface to the FPGA to access these two memories
  • Provide a debug console for both the monitor program and the FPGA
  • Provide an upload facility to both the FPGA and to memory

To date, I’ve:

  • Written the MRAM interface, using the Atmel ASF libraries to handle the SPI
  • Connected and passed traffic between the FPGA and the SAM4 supervisor using the 40MHz SPI interface
  • Started the user interface for the monitor program. At the moment, all it shows is one active item to upload the bitstream to the FPGA and several templated inactive items.
  • Connected and can read/write the RAW flash layer

Where I’ve gotten bogged down is in the flash translation layer (FTL). Continue reading

Retro CPC Dongle – Part 15

In my last post I pushed a ‘Hello World’ configuration to the FPGA through the JTAG port. Since then, I’ve been working on the Altera Fast Passive Parallel configuration ports. The intention is use the microcontroller to manage the register transfer logic (RTL) configuration of the FPGA. Essentially this means the Altera SAM microcontroller can load a ‘personality’ for the dongle. Personalities will be stored in the Flash memory, loaded as required and pushed to the FPGA.

I wrote very simple data transfer program to ensure a correct transfer from the PC to the microcontroller. Continue reading