To help you navigate through the large number of posts for the CPC2 project, you can use this index page.
Post ID | Topics/Description | Date |
Post 1 | The genesis of the CPC2 project and overall concepts | 28-Dec-15 |
Post 2 | A deeper dive into the technical specifications of the CPC2, block diagram, video conversions | 26-Jan-16 |
Post 3 | Memory timing, video upscaling process | 26-Jan-16 |
Post 4 | PCB Layouts, DesignSpark PCB, Libraries, building the CPC2 components in my EDA tool | 24-April-16 |
Post 5 | First board PCB layouts sent to fab! Also SCHEMATICS published! Pin connection guidelines and routing | 13-Aug-16 |
Post 6 | OSH Park boards – comparisons to source layouts | 3-Sep-16 |
Post 7 | Solder stencilling | 11-Sep-16 |
Post 8 | Assembly of the board (#1), microscope paste images, lessons learned! | 18-Sep-16 |
Post 9 | Project restart and new block diagram! | 21-Sep-16 |
Post 10 | New board layout, SAM4S introduction, new PCB layout process, fixed mistakes | 16-Oct-16 |
Post 11 | New PCB arrives! New assembly process | 31-Oct-16 |
Post 12 | PCB assembly, placing components after pasting, microscope paste, mask and reflow images | 12-Nov-16 |
Post 13 | Success! First startup, fault diagnosis, initial processor test | 13-Nov-16 |
Post 14 | FPGA JTAG, LED blinky, belated power calculations | 17-Nov-16 |
Post 15 | Fast passive parallel configuration, binary data over UART, USB FS bandwidth, Guthub upload | 27-Nov-16 |
Post 16 | Flash translation layer, eMMC chips, specification links | 15-Dec-16 |
Post 17 | Optimizing the bitstream upload through USB packet optimization, GCC “attribute optimize” | 30-Dec-16 |
Post 18 | eMMC prototype, fake SD Card, 0.5mm BGA workarounds, eMMC performance | 29-Jan-17 |
Post 19 | SPI waveforms in GTKWave, iVerilog vs Verilator, good FPGA/RTL practices, clock edge lessons | 27-Feb-17 |
Post 20 | More clock edge problems, metastable signals, crossing clock domains | 15-Mar-17 |
Post 20.1 | Github updates | 2-Apr-17 |
Post 21 | Digital sound, Commodore SID, HDMI start up, I2C development, ADV7513 I2C programming | 12-Apr-17 |
Post 22 | HDMI video output, (not) sharing bypass capacitors, software upload option for support CPU | 29-Apr-17 |
Post 23 | DE10-Nano unboxing, booting the standard images, NAT to internet, userspace I/O, Device Tree | 6-May-17 |
Post 23.1 | First CPC Video, combinational vs registered logic | 7-May-17 |
Post 24 | Video of CPC2 booting, USB video capture via UVC | 26-May-17 |
Post 25 | Impedance matching, transmission theory, signal reflections, USB keyboard connection | 13-Jun-17 |
Post 25.1 | Keyboard working video, CPC interrupt fixes | 15-Jun-17 |
Post 26 | Lab power, CPC interrupts, ESP32 and SOUND from HDMI! | 3-July-17 |
Post 27 | A working floppy disk controller | 14-Sept-17 |
Post 28 | Version 2 of the CPC2 board | 12-Oct-17 |
Post 29 | SDRAM Controller | 12-Oct-17 |
Post 30 | Byte Cache Controller Simulation | 12-Oct-17 |
Post 31 | System Design Constraints & Timing | 12-Oct-17 |
Post 32 | New board revision assembly | 31-Dec-17 |
Post 33 | SDRAM and Timing | 09-May-18 |
Post 34 | More on Timing Closure | 22-May-18 |
Post 35 | Proving the SDRAM | 15-June-18 |
Post 36 | Switching to Terasic Dev Board | 09-July-18 |
Post 37 | Tented via’s on HyperRAM board | 09-May-18 |
Post 38 | Exploring HyperRAM | 28-Aug-18 |
Post 39 | Floppy Disk Images stored on eMMC | 02-Feb-19 |
Post 40 | HyperRAM and obsolete components | 25-Aug-19 |
Post 41 | A new hardware build 2.3 | 05-Nov-19 |
Post 42 | Testing results, ESP32 woes and new firmware | 04-Jan-20 |
Post 43 | CPC2 Bluetooth Joystick | 10-May-20 |
Post 44 | Final, working build | 26-Aug-20 |
Post 45 | CPC2 SourceCode | 31-Aug-20 |
Post 46 | 3D printing a case | 18-Oct-20 |
Post 47 | Programming daughterboard | 04-Dec-20 |
Post 48 | Pogo pins and lessons learned | 04-Dec-20 |