Christmas holidays are over and with it, my loooong days testing the CPC2.3 board are also over. So before I go back to work, here’s the current state of the CPC2. Spoiler: It’s GREAT!
The application used for testing is copyright Firebird and Telecomsoft.
Doesn’t time fly? It’s been 6 months since my last post! My only excuse is that I started a new job and learning a new culture and processes is pretty exhausting. I have tended to work on this project during the evening, but kids being what they are, rarely co-operate when you need some project time. Time to work on the CPC2 has been limited indeed.
There’s been a fair bit of activity though, so let’s take you though what has been done.
Following the last post, I connected the USB packet information to the faked keyboard in the FPGA and managed to get this.
There’s a timing issue that I suspect is interrupt related. The key repeat is extremely slow, and this is mainly driven from the 50Hz interrupt line. I faked this signal, so there’s obviously some work to do there! Stay tuned!
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