Final Hardware Build
At long last, the final build of the CPC is finished, tested and working!
Assembly of the new board was pretty uneventful. I followed my usual process of dry assembly on a spare board, solder pasting with a stainless steel stencil, rapidly transferring the components from the dry board to the pasted board followed by a session in the IR oven.
As usual, pasting the top side of the board is tricky when the components on the bottom side of the board prevent the board sitting flush against the paste framing. A few spare boards raise the level up enough to create a flush surface for pasting.
A brief teeth grinding moment happened as I realised that I had short ordered one of the two required 1.8v regulators. I ended up recovering one from a prior build, version 2, that has some fatal issues and would not likely to be reused and finished the assembly very uneventfully.
I gently placed the (now very expensive) board in the reflow oven. As I moved to close the tray, I accidentally but forcefully jogged the board. I cursed my poor co-ordination, and had to spend five minutes visually re-checking the alignment of all of the components on the board. Fortunately, many of the components weigh milligrams and the viscosity of the solder paste held them firmly in place. Heavier components such as the ESP32-WROOM-32 and HDMI socket needed manual adjusting back into place. If you look closely at the ESP32-WROOM-32 in the image below, you can still see that it’s not quite aligned.
However, after a brief session in the reflow oven all components except for the ESP self-aligned correctly. An inspection with the microscope and quick test with the multi-meter confirmed that there were no shorts on the ESP and it would not need to be realigned.
I hand-soldered the USB connectors and proceeded to test the basic functionality. As you saw in the previous build video, the first test is the ‘smoke test’. Turn it on and is any magic smoke emitted? No, OK, proceed to touch each of the VREGs to see if they’re hot? No, great – then I solder on the JTAG connectors on the bottom side of the board.
A short while later and I see the FPGA recognized in the JTAG chain. I flash the FPGA configuration memory and reboot the board and BINGO! The board comes up! WOOHOO!
The board design has changed significantly from the original design vision as I dropped the ARM microcontroller, SPI, SDRAM, caching memory controller and other great technologies that I built, that worked, but ultimately were not needed in the simplified final design. However, one thing that I forcibly resisted was swapping eMMC for an SD card. I wanted a board that had built-in onboard storage, that was guaranteed to work, unlike some SD cards. However, the retirement of the Greenliant 1mm pitch eMMC and the expensive replacement made it difficult to justify holding onto this principle. In the last build, 16GB of eMMC in a 1mm pitch was going to cost 4x the price of an equivalent capacity SD card. I reluctantly swapped the eMMC for an SD card housing. My reluctance was justified as I rewrote the eMMC storage stack.
Revisiting the JESD84-A44 eMMC standard document, I reworked the stack to interface with the SD card. I managed to get the card booted into operation state fairly easily and a long test run of random read/write sectors worked well. In operation however, I had random fatal read errors. I spent a couple of days trying to diagnose the problems, before I decided to try another SD card. The issues immediately disappeared (thanks Emtec !). The card worked perfectly fine in my PC, but not in my CPC2.
While trying other cards and for some unknown reason the ultraspeed SanDisk devices just flat-out refused to register as usable devices, while the Kingston 32GB devices that I eventually used worked perfectly at the first try. I suspect that the Sandisk ultraspeed devices are designed to work at ultra-high speeds and that just wasn’t possible with the CPC2, as it runs as a fraction of the maximum rated speed.
Initial testing suggests that the main hardware components work and so I’ll need to work on the FPGA core and the supervisor code to complete this project. However, I’m able to use the major components, so I’m confident anything minor can be worked around.
I’ve been looking at 3d printing for the CPC2 case, but this turns out to be far more complex that I expected. I’m looking for a very smooth finish on what will be a small device and that seems not to be straightforward. I also wanted the key colours to be faithful to the original and will involve either full colour printing in delicate materials such as super-glued sand, or painting of the final print. Neither option seems particularly satisfactory. So I’ll let you know how the research goes.
Just so you know where I’m heading, if I can run GetDexter on my CPC2, I’ll consider it substantially completed.