Retro CPC Dongle – Part 42

Christmas holidays are over and with it, my loooong days testing the CPC2.3 board are also over. So before I go back to work, here’s the current state of the CPC2. Spoiler: It’s GREAT!

The application used for testing is copyright Firebird and Telecomsoft.

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Retro CPC Dongle – Part 41

Build v2.3

So the next build of the CPC2 is done. I recorded the process with a time-lapse camera because it’s hard to make a 7 hour build entertaining. Each second of video is 30 seconds of assembly time, so this 7-hour build ended up at 7m19s of timelapse, after cutting out the cursing and head-scratching. See if you can spot my hands start to shake at the 2-hour mark of trying to precisely place the sub-millimetre components and enjoy.

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Retro CPC Dongle – Part 40

Doesn’t time fly? It’s been 6 months since my last post! My only excuse is that I started a new job and learning a new culture and processes is pretty exhausting. I have tended to work on this project during the evening, but kids being what they are, rarely co-operate when you need some project time. Time to work on the CPC2 has been limited indeed.

There’s been a fair bit of activity though, so let’s take you though what has been done.

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Retro CPC Dongle – Part 38

This post talks about HyperRAM, what it is, how to interface to it and how to improve the performance of high-speed parallel interfaces.

HyperRAM is described well by Cypress. It is essentially a double data rate RAM with a compact 12-line interface that masks the underlying technology of a DDR SDRAM.  It can provide 333MB/s of data transfer in short bursts. Data is transferred on both edges of the clock, and the narrow bus makes it ideal for microprocessors or pin-constrained FPGAs. Continue reading

Retro CPC Dongle – Part 37

Tented Vias – who’d have thought they play such an essential role? If you have no idea what tented vias are, then you’re not alone and I’m here to enlighten you.

Sadly, this is not a post documenting success, but another important lessons learned. I mentioned in a previous post that I had tired of my custom hardware failing every time I try to solder the next component to the mainboard, so I opted to work on a development board until most of the RTL was proven, and only then move back to custom hardware. I tried the Cyclone V GX Starter kit, but this was lacking a few features like the USB controller I wanted, and was simply too big. I rapidly switched to the fantastic Terasic DE10-Nano SOC. It had a serial interface, the same ADV7513 video chip as my custom board, SDCard and the same USB PHY. All I needed to add was some memory. The DE10-Nano has two expansion ports, so it’s easy to add a daughter board that provides this memory capability:

DE10 with memory daughter board

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